Ivy Bridge will soon be released. Although there 22nm process, native USB 3.0/PCI-E 3.0, many new bright spot, but stagnant for the pursuit of high-standard hardware players, four core, 8MB L3 cache seems I could not get the nature of . Well, look at the server field of the dual Ivy Bridge-EP, four Ivy Bridge-EX is how? The fastest within a year you can see them.
Ivy Bridge-EP is obviously the successor of Sandy Bridge-EP, still uses the LGA2011 package interface , named will continue to be included in the Xeon the E5 sequence, have up to 10 core, 25MB L3 cache (say 30MB, but it seems do not fly), the frequency will increase by 15-20% .
22nm import of new technology is expected to resolve troubled Sandy Bridge-EP, the high power consumption, high heat, not only a higher frequency of high-performance version will have lower power consumption, energy-saving version is expected to 95W, 130W, 150W can see the three grades of thermal design power, respectively, 2.4GHz, 3.0GHz, 3.3GHz around ten-core models.
The same time, the desktop the fever platform of Ivy, Bridge-E can also expect the eight-core and even 10-core model , not content with "mere" six core Core i7-3960X players blessed.
Ivy, Bridge-EP, with the chipset will Patsburg C600, but the stepper should be updated, SAS the 6Gbps the class will cease to exist, but to look at the Intel can perfect solution to the storage controller.
Ivy Bridge-EX look for four large-scale server and data center, which is a new generation of the Xeon the E7 - and so on, one or Westmere-EX, then the middle of the Sandy Bridge-EX Where to go? Sorry, it does not exist. Before the arrival of the 22nm process, the more cores, cache, features stuffed together is too difficult, Intel simply skip this step, but with the time of the Ivy, Bridge-EP, will be closer.
Ivy Bridge-EX core of a very strange number, instead of the traditional multiple of 2, but 15. Intel Why do so in the end is how to do, or even intelligence, or perhaps the final 16-core yet clear.
Each core corresponding to the L3 cache or 2.5MB , but the frequency will be lower than the Ivy Bridge-EP a lot, estimated that no more than 2.4GHz (currently top of the Xeon the E7-4870 this speed). Memory controller will be integrated into four, with expandable memory buffer chip supports eight-channel DDR3-1600 memory, the maximum capacity of 1.5TB (four is 6TB).
QPI bus is 23 , two more than the Ivy Bridge-EP Westmere-EX, but less than four. Three QPI bus for the four-way system, just not too much, but if you want the outside to join the MIC all the core architecture to calculate the expansion of the cards and the like, and then to make a detour, and will naturally increase delay. Taking into account the future Haswell-EX the Braodwell-EX will follow the same platform as the QPI bus limit some really justified.
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